The present invention relates to a method of forming a bottom oxide layer, and more particularly to a method of forming a bottom oxide layer in a trench structure of a trench-type power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device.
Nowadays, trench-type power MOSFET devices are widely used in the semiconductor industry. During the manufacturing process for forming a trench-type power MOSFET, a bottom oxide layer is usually formed in a trench structure of a power MOSFET device to be served as a dielectric layer. For example, a conventional process for forming a bottom oxide layer in a trench structure of a trench-type power MOSFET device is described as follow. FIGS. 1(a) to 1(c) are schematic cross-sectional views illustrating a conventional process for forming a bottom oxide layer in a trench structure of a trench-type power MOSFET device. As shown in FIG. 1(a), a pad oxide layer 11 and a silicon nitride layer 12 are sequentially formed on a semiconductor substrate 1. Then, the silicon nitride layer 12, the pad oxide layer 11, and the semiconductor substrate 1 are partially removed to form at least one trench structure 13 by the photolithography and etching process. Thereafter, as shown in FIG. 1(b), a silicon oxide layer 14 is formed on the silicon nitride layer 12 and on the bottom and sidewall of the trench structure 13 by the High Density Plasma Chemical Vapor Deposition (HDP-CVD) process. The thickness of the silicon oxide layer 14 formed by the HDP-CVD process is almost the same both on the bottom and sidewall. After the etching process is performed to remove the silicon oxide layer 14 on the sidewall of the trench structure 13, as shown in FIG. 1(c), only a portion of the silicon oxide layer 14 on the bottom of the trench structure 13 will remain and is defined as a bottom oxide layer 15.
However, the thickness of the bottom oxide layer typically is not enough after the above processes. In order to achieve the required thickness for the bottom oxide layer, the HDP-CVD process and the etching process need to be repeated again and again. Due to the high cost of the HDP-CVD process and the need for repeated processes, the conventional method requires substantial cost and time to form a bottom oxide layer.
Another method for fabricating a concave bottom oxide in a trench structure is disclosed in U.S. Pat. No. 6,265,269. The following is a summary of that method. First, as shown in FIG. 2(a), a semiconductor substrate 2 is provided, and a pad oxide layer 21 and a silicon nitride layer 22 are then sequentially formed on the semiconductor substrate 2. After that, the silicon nitride layer 22, the pad oxide layer 21, and the semiconductor substrate 2 are partially removed to form a trench structure 23 on the semiconductor substrate 2. Then, as shown in FIG. 2(b), a silicon oxide layer 24 is formed on the bottom and sidewall of the trench structure 23 and on the silicon nitride layer 22 by the Plasma Enhanced Chemical Vapor Deposition (PECVD) process, wherein the silicon oxide layer 24 has an overhang portion A at the corner of the trench structure 23. Subsequently, as shown in FIG. 2(c), an anisotropic etching process (i.e., the dry-etching process) is performed on the silicon oxide layer 24 to form a concave silicon oxide layer 24 in the trench structure 23 by using the overhang portion A as an etching mask to protect the silicon oxide layer 24 near the sidewall of the trench structure 23. Finally, as shown in FIG. 2(d), the wet-etching process is performed to remove the silicon oxide layer 24 on the sidewall of the trench structure 23 and on the silicon nitride layer 22 to form a bottom oxide layer 25 in the trench structure 23.
However, the anisotropic etching process and the wet-etching process both need to be used in the procedure of the above method, as shown in FIGS. 2(c)˜(d), and render the above method more complicated. Therefore, it is desirable to develop a method of forming a bottom oxide layer in a trench structure at reduced cost and time.